PCIe lanes and generations (Gen3/4/5)

A PCIe link is described by generation and lane width, like Gen4 x16 or Gen5 x8. Width sets how many lanes; generation sets the speed per lane. Each generation roughly doubles throughput, so a Gen5 x8 link matches a Gen4 x16 in bandwidth. GPUs and high-end NICs usually want x16, NVMe drives use x4, and boot or management devices use x1.

Total lanes are a finite budget set by the CPU and chipset. A dual-socket server has more lanes than a single socket, but every GPU, NVMe drive, and network card draws from that pool. Overcommitting forces the platform to drop slots to fewer lanes or route them through a PCIe switch that shares bandwidth, which quietly caps performance.

For buyers, confirm both the generation and the actual electrical lane width of each slot, not just the physical connector size. A slot can be physically x16 but wired x8. Match GPU and NVMe generation to the platform, since a Gen5 drive in a Gen4 slot runs at Gen4 speed. Ask the seller for the block diagram.