AMD EPYC generations (Naples to Genoa/Bergamo)
AMD EPYC spans Naples (1st gen), Rome (2nd gen), Milan (3rd gen), and Genoa/Bergamo (4th gen). Rome and Milan use socket SP3 with 8 DDR4 channels and up to 64 cores; Genoa moved to socket SP5 with 12 DDR5 channels, PCIe 5.0, and up to 96 cores.
Naples launched EPYC in 2017 with up to 32 cores on socket SP3 and DDR4. Rome (Zen 2) reached 64 cores and PCIe 4.0, and Milan (Zen 3) kept SP3 and 64 cores while improving per-core performance. All three use 8 DDR4 memory channels per socket.
Genoa (Zen 4) shifted to socket SP5 with 12 DDR5-4800 channels, PCIe 5.0, and CXL, scaling to 96 cores. Bergamo, its cloud-native sibling, uses Zen 4c to pack up to 128 cores for density-focused, throughput-heavy workloads. The socket and memory change means Genoa is not a drop-in upgrade from Milan.
For buyers sourcing from China, EPYC's high core count and channel count make it strong for virtualization and per-socket density. Rome and Milan servers are widely available and cost-effective on DDR4, while Genoa and Bergamo are the choice when you need DDR5 bandwidth, PCIe 5.0, or the highest core counts.
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